Design-Reuse

Axi dma xilinx IP Listing

Rambus PCIe 5.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 5.0 Controller is compliant with the PCI Express 5.0 ... The ...
EDN

Bridging Xilinx Streaming Video Interface with the AXI4-Stream Protocol

The ARM® core AMBA® specification (version 4.0) AXI interconnect standard includes three Advanced eXtensible Interface version 4 (AXI4) interconnect protocols—AXI4 interconnect, AXI4-Lite protocol, ...
Electronics Weekly

Xilinx rolls out IP cores for AMBA AXI4-based FPGAs

Xilinx has started its introduction of intellectual property (IP) cores that meet the AMBA 4 AXI4 bus specification for on-chip interconnections in its FPGAs. Xilinx’s interest in the AMBA AXI4 ...
Design-Reuse

New Xilinx Virtex-6 and Spartan-6 FPGA Connectivity Development Kits Include Northwest Logic DMA Engine IP

SAN JOSE, Calif. -- Dec. 9, 2009-- Xilinx Inc. (Nasdaq: XLNX) today announced the availability of the new Xilinx® Virtex®-6 and Spartan®-6 FPGA Connectivity Development Kits that provide a ...
Business Wire

PLDA Announces Two Innovative vDMA Engine IP Solutions, Delivering Robust Performance and Scalability across a PCIe Link or AMBA AXI Fabric

SAN JOSE, Calif.--(BUSINESS WIRE)--PLDA, the industry leader in PCI Express® IP solutions, today announced two innovative DMA engine solutions designed to manage large and heterogeneous data traffic ...