Nanowerk

World's first vertically stacked gate-all-around Si nanowire CMOS transistors

(Nanowerk News) At this week’s IEEE IEDM conference, world-leading research and innovation hub for nano-electronics and digital technology, imec, reported for the first time the CMOS integration of ...
EDN

Matching ESD protection to process geometry

Advanced CMOS process technologies enable IC designers to deliver higher performing devices, but also increase the need for extra board-level ESD protection to ensure the reliability of the end ...
EDN

Models for high-voltage transistors in a standard CMOS process

Designers of electronics and communications systems are constantly faced with the challenge of integrating greater functionality on less silicon area. Many of the system blocks – such as power ...
Electronic Design

TVS Diode Arrays Protect Low Voltage CMOS Devices

Littelfuse, Inc.has introduced the SLVU2.8-8 Series 2.8V, 30A TVS Diode Array (SPA Diodes), designed to protect low voltage CMOS devices from damage caused by ESD and lightning-induced transients.
Design-Reuse

Electronic Circuit Design for RF Energy Harvesting using 28nm FD-SOI Technology

A design of voltage doubler circuit has been studied in context of electromagnetic energy harvesting using 28 nm FD-SOI technology. After analysis of the operating constraints of the circuit, the ...